🜂 HXPU LADDER — CHIP TIERS

# 🜂 HXPU LADDER — CHIP TIERS

## Overview

HXPU is not a single device.

It is a spectrum of physical embodiments, from signal-level chips to sovereign Portal nodes.

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## 🜁 Tier 0 — Signal Seed (Microcontroller)

**Cost:** $2–$15 **Examples:** RP2040, ESP32, STM32 **Rust Mode:** `no_std`

### Capabilities - Sensor input (GPIO, analog, serial) - Event emission - Simple state machines

### Limitations - No OS - No database - No Portal runtime

### Role > HXPU Seed — reflex and sensing layer

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## 🜃 Tier 1 — Logic Shaper (FPGA)

**Cost:** $30–$120 **Examples:** Lattice iCE40, ECP5

### Capabilities - Parallel signal processing - Deterministic pipelines - Custom hardware logic

### Limitations - No Linux - Limited memory

### Role > HXPU Core Experiment — shaping signals

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## 🜄 Tier 2 — Companion Node (Embedded Linux)

**Cost:** $50–$200 **Examples:** Raspberry Pi, BeagleBone

### Capabilities - Full Linux - Run Portal binary - Local DB - Networking

### Role > First true Portal node — local sovereignty

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## 🜅 Tier 3 — Sovereign Portal Box

**Cost:** $150–$500+ **Examples:** Mini PC, server

### Capabilities - Full Portal stack - Mesh participation - High concurrency

### Role > Hearth — world-level node

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## 🜆 Tier Relationships

Tier 0 → senses Tier 1 → shapes Tier 2 → interprets Tier 3 → remembers the world

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## 🜇 Strategy

1. Build Portalized Linux node (Tier 2/3) 2. Attach Tier 0 sensors 3. Experiment with Tier 1 logic 4. Evolve toward HXPU

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## 🜈 Final Principle

> HXPU is not a chip. > It is the emergence of Portal-native physical form.